A process for the self-limited layer synthesis (SLS) of WSe2 on SiO2 substrates has been developed that provides systematic layer number controllability with micrometer-scale (>90%) and wafer-scale (~8 cm) uniformity suitable electronic and optoelectronic device applications. This was confirmed by the fabrication and testing of a WSe2 back-gated field effect transistor (FET) using Pd (30 nm) as the contact metal, which exhibited p-type behavior with an on/off ratio of ~106 and a field-effect hole mobility of 2.2 cm2 V−1 s−1 value, which was higher than has been reported for WSe2-based FETs produced by conventional chemical vapor deposition. On the basis of these results, it is proposed that the SLS method is universally applicable to a range of device applications.
Publications
Prof. Zonghoon Lee’s Atomic-Scale Electron Microscopy Lab